A high density BiCMOS direct drive array

Author

Wong, Anthony ; Hui, Alex ; Chan, Eric ; Wong, Dan ; Chan, Stetre ; Carney, Bill

Author_Institution

LSI Logic Corp., Milpitas, CA, USA

fYear

1988

fDate

16-19 May 1988

Abstract

A BiCMOS (bipolar complementary metal-oxide semiconductor) gate array with nearly the same density as a standard CMOS array has been realized using an advanced 1.5-μm BiCMOS process and a channelless architecture. A two-input BiCMOS NAND gate has a delay of 800 ps when driving a load of sixteen, which is half the delay in CMOS. Arrays with up to 123 K equivalent gates can be achieved with an optimal ratio of CMOS logic gates and BiCMOS blocks

Keywords

VLSI; cellular arrays; integrated logic circuits; monolithic integrated circuits; 1.5 micron; 800 ns; BiCMOS; channelless architecture; direct drive array; gate array; high density; logic IC, VLSI; two input NAND gate; BiCMOS integrated circuits; CMOS logic circuits; CMOS process; CMOS technology; Delay; Logic arrays; Logic design; Logic gates; MOSFETs; Macrocell networks;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 1988., Proceedings of the IEEE 1988

Conference_Location

Rochester, NY

Type

conf

DOI

10.1109/CICC.1988.20901

Filename

20901

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3125834