DocumentCode :
3126115
Title :
dIP: A Non-intrusive Debugging IP for Dynamic Data Race Detection in Many-Core
Author :
Wen, Chi-Neng ; Chou, Shu-Hsuan ; Chen, Tien-Fu
Author_Institution :
Nat. Chung-Cheng Univ., Chiayi, Taiwan
fYear :
2009
fDate :
14-16 Dec. 2009
Firstpage :
86
Lastpage :
91
Abstract :
Traditional debug facilities are limited in providing debugging requirements for multicore parallel programming. Synchronization problems or bugs due to race conditions are particularly difficult to detect with software debugging tools. This work presents a fast and feasible hardware-assistant solution for many-core non-intrusive debugging. The key idea is to keep tracks of data accesses of shared memory areas and their lock synchronization activities by proposed data structures in proposed debugging IP (dIP). A page-based shared variable cache is provided to keep shared variables as long as possible, and an inexpensive pluggable off-chip RAM can eliminate the false-positive rate efficiently. To decrease the debugging traffic block, this work provides a thread library to specify shared memory/lock events and transmit those events to the dIP by a small proper hardware co-processor (eXtend dIP) of each core. Our experimental result shows the debugging traffic block (worse-case) by increasing cores, and adding tolerance buffers in XdIP can efficiently ease off. Moreover, the real workloads (SPLASH-2, MPEG-4, and H.264) are executed by the dIP non-instructive race-detection with only 4.7%~12.2% slow down in average. Finally, the hardware cost of dIP is also low when the growing of many-core.
Keywords :
cache storage; data structures; multi-threading; program debugging; shared memory systems; software libraries; software tools; H.264; MPEG-4; SPLASH-2; data structures; debug facilities; debugging traffic block; dynamic data race detection; extend dIP; fault tolerance; hardware co-processor; hardware-assistant solution; lock events; lock synchronization activities; many-core nonintrusive debugging; multicore parallel programming; nonintrusive debugging IP; page-based shared variable cache; pluggable off-chip RAM; shared memory areas; software debugging tools; synchronization problems; thread library; Computer bugs; Data structures; Hardware; Libraries; Multicore processing; Parallel programming; Random access memory; Read-write memory; Software debugging; Yarn; Fault-Tolerance; Heterogeneous (hybrid) systems; Multi-core; debugging;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Pervasive Systems, Algorithms, and Networks (ISPAN), 2009 10th International Symposium on
Conference_Location :
Kaohsiung
Print_ISBN :
978-1-4244-5403-7
Type :
conf
DOI :
10.1109/I-SPAN.2009.123
Filename :
5381960
Link To Document :
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