Title :
An ultra-high speed gate array based on 0.6 μm silicon bipolar technology
Author :
Cooke, M.P. ; Golder, K.J. ; Taylor, D.G.
Author_Institution :
Plessey Semicond. Ltd., Swindon, UK
Abstract :
A 240-gate silicon bipolar array is described. The array is manufactured by a state-of-the-art 0.6-μm bipolar process. A typical gate delay is 80 ps for a fanout of two, and the maximum D-type toggle rate is 3.6 GHz. The array is intended for applications with data I/O rates up to 6 Gb/s
Keywords :
bipolar integrated circuits; cellular arrays; elemental semiconductors; integrated logic circuits; silicon; 0.6 micron; 3.6 GHz; 6 Gbit/s; 80 ps; Si; bipolar technology; gate array; gate delay; logic IC; maximum D-type toggle rate; ultrahigh speed operations; Bonding; Crosstalk; Delay; Integrated circuit packaging; Logic arrays; Metallization; Radio frequency; SPICE; Silicon; Thermal resistance;
Conference_Titel :
Custom Integrated Circuits Conference, 1988., Proceedings of the IEEE 1988
Conference_Location :
Rochester, NY
DOI :
10.1109/CICC.1988.20903
