• DocumentCode
    312666
  • Title

    Design of a programmable mixed-signal CMOS image-processing chip in 0.8 μm CMOS

  • Author

    Vázquez, A. Rodríguez- ; Espejo, S. ; Domínguez-Castro, R. ; Carmona, R.

  • Author_Institution
    Inst. de Microelectron., Seville Univ., Spain
  • Volume
    1
  • fYear
    1997
  • fDate
    9-12 Jun 1997
  • Firstpage
    725
  • Abstract
    An operational vision-chip prototype with a wide-range of potential applications in artificial-vision systems is presented. Its functionality includes concurrent image-transduction, programmable image-processing, image-storage, and algorithmic control over a network of 20×22 identical cells. The prototype has been designed and manufactured in 0.8 μm CMOS standard technology, and has a total area of 30 mm2. Experimental results are reported
  • Keywords
    CMOS integrated circuits; computer vision; image processing equipment; integrated circuit design; mixed analogue-digital integrated circuits; 0.8 micron; algorithmic control; artificial-vision systems; concurrent image-transduction; image-storage; mixed-signal CMOS; operational vision-chip prototype; programmable image-processing chip; CMOS image sensors; CMOS process; CMOS technology; Cameras; Cellular neural networks; Circuits; Image processing; Parallel processing; Prototypes; Retina;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1997. ISCAS '97., Proceedings of 1997 IEEE International Symposium on
  • Print_ISBN
    0-7803-3583-X
  • Type

    conf

  • DOI
    10.1109/ISCAS.1997.608979
  • Filename
    608979