Title :
Echo canceller design for high speed modems
Author :
Corder, Rodney J. ; Perkins, Carl C.
Author_Institution :
Rockwell Int., Newport Beach, CA, USA
Abstract :
The authors outline the development of a single-chip echo canceller for high-speed modem applications. The device was designed using standard-cell, compiler, and custom design methodologies. The device implements an algorithm in silicon and is capable of 36-million 32-bit arithmetic operations per second at a 12-MHz clock rate. The design consists of 73931 transistors, resulting in a die size of 8.3 mm×8.1 mm, in a 2.0-μm CMOS process
Keywords :
CMOS integrated circuits; VLSI; digital integrated circuits; echo suppression; modems; 12 MHz; 2 micron; 32-bit arithmetic operations; 8.3 mm; CMOS; VLSI; algorithm in silicon; clock rate; compiler methodology; custom design methodologies; die size; high speed modems; single-chip echo canceller; standard cell arrays; Algorithm design and analysis; Arithmetic; Circuit simulation; Clocks; Design methodology; Echo cancellers; Modems; Silicon; Solid modeling; Transmitters;
Conference_Titel :
Custom Integrated Circuits Conference, 1988., Proceedings of the IEEE 1988
Conference_Location :
Rochester, NY
DOI :
10.1109/CICC.1988.20909
