Bi-CMOS technology for semi-custom integrated circuits

Author

Alvarez, A.R. ; Schucker, D.W.

Author_Institution

Cypress Semicond., San Jose, CA, USA

fYear

1988

fDate

16-19 May 1988

Abstract

Technology requirements for (bipolar metal-oxide semiconductor) BiCMOS and semicustom circuit implementations are reviewed. It is proposed that three basic BiCMOS technologies will evolve: high-performance, low cost, and analog-compatible. A first-order estimate of chip and manufacturing costs for BiCMOS suggests a 20-35% increase in die cost. This increase in die costs can only be justified if system performance is improved by 50% or more. A survey of applications indicates that a 50% increase in performance is usually conservative. Significant improvement in I/O speed, ground bounce, clock skew, as well as just internal gate delay is obtained by judicious use of BiCMOS. The availability of high-speed, low-power, high-density ECL SRAMs (emitter-coupled-logic static random-access memories), and upcoming ECL I/O CPUs makes BiCMOS the obvious choice for implementing high-performance ASIC systems

Keywords

VLSI; integrated circuit technology; integrated logic circuits; technological forecasting; ASIC systems; Bi-CMOS technology; ECL I/O CPUs; ECL SRAMs; I/O speed; VLSI; analog-compatible; applications; bipolar metal-oxide semiconductor; clock skew; cost estimation; die cost; ground bounce; high-performance; internal gate delay; low cost; manufacturing costs; semi-custom integrated circuits; Application specific integrated circuits; Availability; BiCMOS integrated circuits; Clocks; Costs; Delay; Integrated circuit technology; MOS devices; Semiconductor device manufacture; System performance;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 1988., Proceedings of the IEEE 1988

Conference_Location

Rochester, NY

Type

conf

DOI

10.1109/CICC.1988.20912

Filename

20912