DocumentCode
3127721
Title
Global memory mapping for FPGA-based reconfigurable systems
Author
Ouaiss, Iyad ; Vemuri, Ranga
Author_Institution
University of Cincinnati
fYear
2000
fDate
23-27 April 2000
Firstpage
1473
Lastpage
1480
Keywords
Application specific integrated circuits; Data structures; Delay; Field programmable gate arrays; Hardware; Integer linear programming; Random access memory; Read-write memory; Signal mapping; System-on-a-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel and Distributed Processing Symposium., Proceedings 15th International
Conference_Location
San Francisco, CA, USA
ISSN
1530-2075
Print_ISBN
0-7695-0990-8
Type
conf
DOI
10.1109/IPDPS.2001.925131
Filename
925131
Link To Document