Title :
Minimizing routing configuration cost in dynamically reconfigurable FPGAs
Author :
Rakhmatov, Daler ; Vrudhula, Sarma B K
Author_Institution :
University of Arizona
Keywords :
Character generation; Costs; Delay; Field programmable gate arrays; Hardware; Power dissipation; Reconfigurable logic; Routing; Runtime; Standards organizations;
Conference_Titel :
Parallel and Distributed Processing Symposium., Proceedings 15th International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7695-0990-8
DOI :
10.1109/IPDPS.2001.925132
