70 ps ECL gate Si bipolar technology using Borosenic-poly process with coupling-base implant

A high-speed self-aligned double-polysilicon emitter/base bipolar technology has been developed by using boron and arsenic diffusions through an emitter polysilicon film (borosenic-poly process) combined with a coupling-base boron implantation. Use of the borosenic-poly process produces a transistor base width of less than 100 Å and an emitter-to-base reverse leakage current of approximately 70 pA. The coupling-base boron implant significantly improves a wide variation in emitter-to-collector periphery punchthrough voltage without degrading the emitter-to-base breakdown voltage, current gain, cutoff frequency, and the ECL (emitter-coupled logic) gate delay time. A deep trench isolation 4 μm deep and 1.2 μm wide reduces the collector-to-substrate capacitance to 9 fF, while maintaining a transistor-to-transistor isolation voltage of greater than 25 V. The ECL gate delay time is 70 ps for a fan-out of one and 93 ps for a fan-out of three at a gate current of 400 μA. Diagnostic 4-bit and 5-bit A-D (analog-to-digital) converters demonstrate sampling rate of 1.5 GS/s and 1.0 GS/s, respectively, without using a sample-and-hold circuit