DocumentCode :
3128182
Title :
A novel base emitter self-alignment process for high speed bipolar LSIs
Author :
Okita, Y. ; Shinozawa, M. ; Kawakatsu, A. ; Umemura, Y. ; Yamaguchi, K. ; Akahane, Kouichi
Author_Institution :
OKI Elect. Ind. Co., Ltd., Tokyo, Japan
fYear :
1988
fDate :
16-19 May 1988
Abstract :
A novel base-emitter self-alignment process is described. It produces a transistor which has a cutoff frequency of 12 GHz. It provides 88 ps of propagation delay for an ECL (emitter-coupled logic) gate. The process is characterized by its extensive use of S i/sub 3/N/sub 4/. Utilizing Si/sub 3/N/sub 4/ as a multipurpose layer, the main structures (active region of transistor and resistor) are defined by self-alignment from a single photomask. In addition, constituent materials are chosen to have enough mutual selectivity under conventional etching processes. Therefore, the process has an excellent reproducibility with less strict requirements than standard etching technology.<>
Keywords :
bipolar integrated circuits; emitter-coupled logic; integrated circuit technology; integrated logic circuits; large scale integration; semiconductor technology; 12 GHz; 88 ps; ECL gates; Si/sub 3/N/sub 4/ films; base emitter self-alignment process; cutoff frequency; high speed bipolar LSIs; propagation delay; reproducibility; single photomask; submicron emitters; Anisotropic magnetoresistance; Boron; Dry etching; Electrodes; Large scale integration; Oxidation; Parasitic capacitance; Resistors; Silicon; Transistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Custom Integrated Circuits Conference, 1988., Proceedings of the IEEE 1988
Conference_Location :
Rochester, NY
Type :
conf
DOI :
10.1109/CICC.1988.20915
Filename :
20915
Link To Document :
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