DocumentCode :
3129234
Title :
A 4Mb Pseudo SRAM Operating At 2.6//sup +/sub -//1V With 3/spl mu/A Data Retention Current
Author :
Sato, K. ; Kajimoto, T. ; Kawamoto, H. ; Kenmizaki, K. ; Kubono, S. ; Mochizuki, T. ; Aoyagi, H. ; Kanamitsu, M. ; Kunito, S. ; Sano, S. ; Ogishima, A.
Author_Institution :
Hitachi Ltd.
fYear :
1991
fDate :
13-15 Feb. 1991
Firstpage :
268
Lastpage :
269
Keywords :
CMOS technology; Circuits; Current measurement; Indium tin oxide; Maintenance; Packaging; Random access memory; Temperature measurement; Very large scale integration; Wiring;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 1991. Digest of Technical Papers. 38th ISSCC., 1991 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-87942-644-6
Type :
conf
DOI :
10.1109/ISSCC.1991.689155
Filename :
689155
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=3129234
بازگشت