• DocumentCode
    3129368
  • Title

    A Co-processor Design of an Energy Efficient Reconfigurable Accelerator CMA

  • Author

    Izawa, Mai ; Ozaki, N. ; Koizumi, Yuki ; Uno, R. ; Amano, Hideharu

  • Author_Institution
    Dept. of Inf. & Comput. Sci., Keio Univ., Yokohama, Japan
  • fYear
    2013
  • fDate
    4-6 Dec. 2013
  • Firstpage
    148
  • Lastpage
    154
  • Abstract
    Cool Mega Array (CMA) is an energy efficient reconfigurable accelerator consisting of a large PE array with combinatorial circuits and a small microcontroller. In order to enhance the energy efficiency of the total system, a coprocessor design of CMA(Cool Mega Array), called CMA-Geyser is proposed. By replacing the programmable microcontroller by the host processor Geyser with a dedicated hardware controller, the setting up for the CMA and data transfer can be efficiently done. The design using 65nm CMOS process is compared with offloading style multicore system Cube-1. By eliminating the data memory and routers required in Cube-1, CMA-Geyser reduced 24.8% semiconductor area. By reducing both execution time and average power consumption, CMA-Geyser achieved about 3.4 times energy efficiency of Cube-1.
  • Keywords
    CMOS integrated circuits; combinational circuits; coprocessors; integrated circuit design; microcontrollers; CMA-Geyser; CMOS process; PE array; co-processor design; combinatorial circuits; cool mega array; data transfer; energy efficiency; host processor; programmable microcontroller; reconfigurable accelerator; size 65 nm; Arrays; Data transfer; Memory management; Microcontrollers; Power demand; Registers; Embedded System; Low Power Computation; Reconfigurable Processors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computing and Networking (CANDAR), 2013 First International Symposium on
  • Conference_Location
    Matsuyama
  • Print_ISBN
    978-1-4799-2795-1
  • Type

    conf

  • DOI
    10.1109/CANDAR.2013.28
  • Filename
    6726890