Towards understanding degradation and breakdown of SiO2/high-k stacks

To investigate the electrical properties and the reliability of high-k stacks, the leakage current and the time-dependent-dielectric-breakdown (TDDB) of SiO/sub 2//ZrO/sub 2/ double layers over a large thickness variation were measured. The strong asymmetry in leakage current for gate and substrate injection and the complicated determination of time-to-breakdown (t/sub BD/) especially for thin interfacial layers is explained. We show that for both polarities the interfacial layer determines the breakdown of the whole stack, but due to reduced leakage at low voltages the lifetime extrapolation models developed for single SiO/sub 2/ layers cannot be simply adopted.