Title :
A novel stack capacitor cell for high density FeRAM compatible with CMOS logic
Author :
Hayashi, Takahisa ; Igarashi, Yasush ; Inomata, Daisuke ; Ichimori, Takashi ; Mitsuhashi, Toshirou ; Ashikaga, Kinya ; Ito, Toshio ; Yoshimaru, Masaki ; Nagata, Masaya ; Mitarai, S. ; Godaiin, Hironori ; Nagahama, Tsutomu ; Isobe, Chiharu ; Moriya, Hiroyu
Author_Institution :
Syst. LSI Res. Div., Oki Electr. Ind. Co. Ltd., Tokyo, Japan
Abstract :
We have developed 4 Mb 1T1C FeRAM device technology using 0.25 /spl mu/m design rules, which is fully compatible with CMOS logic. This consists of three key technologies: a diffusion barrier and an oxidation barrier to W-plug, low thermal budget process for SrBi/sub 2/Ta/sub 2/O/sub 9/ (SBT)-capacitors and no via contact cell scheme.
Keywords :
CMOS logic circuits; diffusion barriers; ferroelectric capacitors; ferroelectric storage; low-power electronics; rapid thermal processing; 0.25 /spl mu/m design rules; 0.25 micron; 1T1C FeRAM device technology; 4 Mbit; CMOS logic compatibility; SrBi/sub 2/Ta/sub 2/O/sub 9/; SrBi/sub 2/Ta/sub 2/O/sub 9/ capacitors; W; W-plug; diffusion barrier; high density FeRAM; low power system LSIs; low thermal budget process; no via contact cell scheme; oxidation barrier; stack capacitor cell; CMOS logic circuits; CMOS technology; Capacitors; Electrodes; Ferroelectric films; Logic devices; Nonvolatile memory; Oxidation; Random access memory; Tellurium;
Conference_Titel :
Electron Devices Meeting, 2002. IEDM '02. International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-7462-2
DOI :
10.1109/IEDM.2002.1175899
