Modeling of metal-induced-lateral-crystallization mechanism for optimization of high performance thin-film-transistor fabrication

Author

Cheng, C.F. ; Poon, M.C. ; Kok, C.W. ; Chan, M.

Author_Institution

Dept. of Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., Kowloon, China

fYear

2002

fDate

8-11 Dec. 2002

Firstpage

569

Lastpage

572

Abstract

A model to predict metal-induced-lateral-crystallization (MILC) growth rate, polysilicon grain size and metal impurity distribution is proposed. The accuracy of the model has been validated by experimental results obtained from SIMS analysis. It is believed that the model gives important information for superior MILC device fabrication and development.

Keywords

elemental semiconductors; grain boundaries; grain size; impurity distribution; recrystallisation annealing; secondary ion mass spectra; semiconductor process modelling; silicon; thin film transistors; 525 to 625 C; MILC device fabrication; SIMS analysis; Si; annealing temperature; growth rate; metal impurity distribution; metal-induced-lateral-crystallization mechanism; model; polysilicon TFT fabrication optimization; polysilicon grain size; Annealing; Atomic layer deposition; Crystallization; Fabrication; Grain boundaries; Grain size; Impurities; Microwave integrated circuits; Nickel; Silicides;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 2002. IEDM '02. International

Conference_Location

San Francisco, CA, USA

Print_ISBN

0-7803-7462-2

Type

conf

DOI

10.1109/IEDM.2002.1175905

Filename

1175905