Title :
Cost-effective "BARC/resist-via-fill free" integration technology for 0.13 /spl mu/m Cu/low-k
Author :
Lee, Soo-Geun ; Lee, Kyoung-Woo ; Kim, Il-Goo ; Park, Wan-Jae ; Wee, Young-Jin ; Song, Won-Sang ; Kim, Jae-Hak ; Lee, Seung-jin ; Oh, Hyeok-Sang ; Lee, Yong-Tak ; Chung, Joo-Hyuk ; Kang, Ho-Kyu ; Suh, Kwang-Pyuk
Author_Institution :
Adv. Process Dev. Team, Samsung Electron. Co. Ltd., Kyunggi-Do, South Korea
Abstract :
Demonstrates the first successful integration scheme free of BARC/resist via-fill that not only significantly simplifies the overall process complexity, but also reduces cost and process instabilities by employing an OSG (k=2.9)/ HDP-FSG dual ILD structure in conjunction with our proprietary plasma induced polymeric etch stopper (PIPS) in a 7-metal level 0. 13 /spl mu/m design node. The via poisoning problem and low selectivity of etch stopper were overcome by optimizing ILD structure and PIPS etch process. The electrical characteristics and reliability results indicate that the current integration scheme is highly manufacturable.
Keywords :
copper; dielectric thin films; integrated circuit metallisation; integrated circuit reliability; integrated circuit yield; 0.13 micron; BARC/resist-via-fill free integration technology; Cu; Cu/low-k integration; OSG/HDP-FSG dual ILD structure; PIPS; overall process complexity; plasma induced polymeric etch stopper; process instabilities; reliability; selectivity; via poisoning problem; Costs; Dielectrics; Etching; Optical films; Plasma applications; Plasma chemistry; Plasma materials processing; Polymer films; Resists; Silicon carbide;
Conference_Titel :
Electron Devices Meeting, 2002. IEDM '02. International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-7462-2
DOI :
10.1109/IEDM.2002.1175910
