Title :
Quantum tunneling and scalability of HfO2 and HfAlO gate stacks
Author :
Hou, Y.T. ; Li, M.-F. ; Yu, H.Y. ; Jin, Y. ; Kwong, D.L.
Author_Institution :
Dept. of Electr. & Comput. Eng., Nat. Univ. of Singapore, Singapore
Abstract :
We present a physical model for tunneling current through high-/spl kappa/ gate stacks including an ultra thin interfacial layer between high-/spl kappa/ layers and the Si substrate. The energy band offsets of high-/spl kappa/ are determined by XPS. Accurate carrier quantization in the substrate or gate is found to play a more significant role in tunneling through high-/spl kappa/ dielectrics than in SiO/sub 2/. Excellent agreement between simulated and measured tunneling currents is achieved over several high-/spl kappa/ dielectrics with both poly-Si and metal gate electrodes. The model is also applied to analyze the scalability of HfO/sub 2/ and HfAlO gate stacks in future CMOS technology.
Keywords :
CMOS integrated circuits; MIS devices; WKB calculations; X-ray photoelectron spectra; dielectric thin films; hafnium compounds; interface states; quantum interference phenomena; semiconductor device models; semiconductor-insulator boundaries; tunnelling; CMOS technology; HfAlO gate stacks; HfAlO-Si; HfO/sub 2/ gate stacks; HfO/sub 2/-Si; MOS devices; Si; Si substrate; XPS; carrier quantization; electron quantization; energy band offsets; high-/spl kappa/ gate stack; hole quantization; metal gate electrodes; modified WKB approximation; physical model; poly-Si electrodes; quantum tunneling; scalability; tunneling current; ultra thin interfacial layer; CMOS technology; Current measurement; Dielectric measurements; Dielectric substrates; Electrodes; Hafnium oxide; Quantization; Scalability; Semiconductor device modeling; Tunneling;
Conference_Titel :
Electron Devices Meeting, 2002. IEDM '02. International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-7462-2
DOI :
10.1109/IEDM.2002.1175942
