DocumentCode :
3131392
Title :
Microprocessor silicon debug based on failure propagation tracing
Author :
Caty, Olivier ; Dahlgren, Peter ; Bayraktaroglu, Ismet
Author_Institution :
Sun Microsystems, Inc., Sunnyvale, CA
fYear :
2005
fDate :
8-8 Nov. 2005
Lastpage :
293
Abstract :
As the complexity of microprocessors increases, the design and bring-up times have significantly increased, negatively impacting the time-to-market (TTM) requirements. In this paper, a backtracing methodology for identifying the root cause of functional failures on the UltraSPARCtrade family of processors is presented. Data provided by a scan dump analysis methodology is linked not only to the design database but also to the failing test in order to isolate one or several candidates for further analysis
Keywords :
boundary scan testing; integrated circuit testing; microprocessor chips; Si; UltraSPARC; backtracing methodology; failure propagation tracing; microprocessor silicon debug; scan dump analysis; time-to-market; Clocks; Frequency; Logic devices; Logic testing; Manufacturing; Microprocessors; Silicon; Sun; Timing; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Conference, 2005. Proceedings. ITC 2005. IEEE International
Conference_Location :
Austin, TX
Print_ISBN :
0-7803-9038-5
Type :
conf
DOI :
10.1109/TEST.2005.1583986
Filename :
1583986
Link To Document :
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