Title :
Nitride-sandwiched-oxide gate insulator for low power CMOS
Author :
Ishikawa, D. ; Sakai, S. ; Katsuyama, K. ; Hiraiwa, A.
Author_Institution :
Device Dev. Center, Hitachi Ltd., Tokyo, Japan
Abstract :
A gate insulator with a novel nitride-sandwiched oxide (NSO) structure was formed by successive NO and plasma nitridation steps. This approach reduced the leakage current to 15% of the oxide value, while enhancing the electron mobility by 15%. NSO also has high dielectric reliability and almost completely blocks B penetration in a PMOS device. Our experiments have confirmed that NSO is a very promising technology for forming gate insulators in low-power CMOS devices in the 100-nm to 80-nm node.
Keywords :
CMOS integrated circuits; MOSFET; dielectric thin films; electron mobility; large scale integration; leakage currents; low-power electronics; nitridation; 100 to 80 nm; LSIs; MOSFETs; NO; dielectric reliability; electron mobility; gate insulators; leakage current; low power CMOS; nitride-sandwiched-oxide gate insulator; plasma nitridation steps; Atomic measurements; Dielectrics and electrical insulation; Electron mobility; Leakage current; Plasma chemistry; Plasma confinement; Plasma density; Plasma measurements; Plasma sources; Thermal degradation;
Conference_Titel :
Electron Devices Meeting, 2002. IEDM '02. International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-7462-2
DOI :
10.1109/IEDM.2002.1175975
