DocumentCode
3131724
Title
Balancing mask and lithography costs
Author
Bonn, Jeffrey ; Sisler, Sharon ; Tivnan, Patricia
Author_Institution
IBM Corp., Essex Junction, VT, USA
fYear
2001
fDate
2001
Firstpage
25
Lastpage
27
Abstract
This paper describes a fundamental change in strategy to balance mask and lithography costs at a multi-technology, multi-part number IBM Microelectronics semiconductor fabricator. The strategy is to reduce mask costs by printing fewer chips in each exposure whenever it is cost effective to do so. This paper discusses the advantages and drawbacks of this strategy, describes ways to implement it with the least impact on lithography tool productivity, and shows how to calculate the cost trade-off between mask costs and lithography costs
Keywords
integrated circuit economics; integrated circuit technology; manufacturing resources planning; masks; photolithography; strategic planning; chip printing per exposure; cost effectiveness; cost trade-off; lithography costs; lithography tool productivity; mask cost reduction; mask costs; mask/lithography cost balancing; multi-technology multi-part number semiconductor fabricator; production strategy; Costs; Lenses; Lithography; Manufacturing; Microelectronics; Printing; Production; Productivity; Rivers; Semiconductor device manufacture;
fLanguage
English
Publisher
ieee
Conference_Titel
Advanced Semiconductor Manufacturing Conference, 2001 IEEE/SEMI
Conference_Location
Munich
ISSN
1078-8743
Print_ISBN
0-7803-6555-0
Type
conf
DOI
10.1109/ASMC.2001.925610
Filename
925610
Link To Document