Title :
Arithmetic for relative accuracy
Author :
vanDrunen, R. ; Spaanenburg, L. ; Lucassen, P. ; Nijhuis, J.A.G. ; Udding, J.T.
Author_Institution :
Dept. of Comput. Sci., Rijksuniversiteit Groningen, Netherlands
Abstract :
Of the three factors named in Moore´s first Law that drive the advance of computational systems, circuit design receives relatively little mention. We introduce here a circuit variety that allows to include accuracy considerations. It is shown that accuracy-drive can be effectively realised and leads to 60% speed improvement. Details are given of a floating-point unit with full hardware support of complex calculations, specifically tailored to speed-up MD-simulations on the GROMACS scientific parallel computer
Keywords :
floating point arithmetic; GROMACS scientific parallel computer; MD-simulations; Moore´s first Law; circuit design; complex calculations; computational systems; floating-point unit; full hardware support; Arithmetic; Circuit synthesis; Computer architecture; Concurrent computing; Event detection; Hardware; Microelectronics; Parallel processing; Qualifications; System recovery;
Conference_Titel :
Computer Arithmetic, 1995., Proceedings of the 12th Symposium on
Conference_Location :
Bath
Print_ISBN :
0-8186-7089-4
DOI :
10.1109/ARITH.1995.465357
