DocumentCode :
3131949
Title :
XWRC: externally-loaded weighted random pattern testing for input test data compression
Author :
Wang, Seongmoon ; Balakrishnan, Kedarnath J. ; Chakradhar, Srimat T.
Author_Institution :
NEC Labs. America, Princeton, NJ
fYear :
2005
fDate :
8-8 Nov. 2005
Lastpage :
580
Abstract :
This paper presents an input test data compression scheme that combines the advantages of weighted pseudorandom testing techniques and LFSR reseeding. The scheme requires low area overhead and the compression achieved is not limited by the LFSR reseeding bounds. The test data storage requirements of both the static and dynamic versions of the proposed scheme are lower than previously published results. The total numbers of test patterns that need to be applied are much lower than that for any weighted pseudorandom testing or hybrid BIST scheme. Further, the method provides an easy way to trade off between test application time and test data compression. The static version of the scheme can be easily implemented without any modification to the current test generation flow while the dynamic version can be used if the ATPG can be modified. Experimental results on a large industry design show that over 100times compression is achievable by the proposed scheme
Keywords :
automatic test pattern generation; built-in self test; data compression; logic testing; ATPG; BIST; LFSR; XWRC testing; externally-loaded weighted random pattern testing; input test data compression; test data storage; test patterns; weighted pseudorandom testing; Automatic test pattern generation; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Costs; Memory; National electric code; Test data compression; Test pattern generators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Conference, 2005. Proceedings. ITC 2005. IEEE International
Conference_Location :
Austin, TX
Print_ISBN :
0-7803-9038-5
Type :
conf
DOI :
10.1109/TEST.2005.1584018
Filename :
1584018
Link To Document :
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