• DocumentCode
    3132000
  • Title

    A hardmask STI etch process for 0.13 μm logic technology and beyond

  • Author

    Wong, Justin ; Weil, James ; Whiting, Chip ; Yu, Chien ; Porth, Bruce ; Hart, James, III ; Matteson, George ; Mochiki, Hiromasa ; Hagihara, Masaaki

  • Author_Institution
    IBM Corp., Essex Junction, VT, USA
  • fYear
    2001
  • fDate
    2001
  • Firstpage
    85
  • Lastpage
    94
  • Abstract
    Shallow trench isolation (STI) is a standard device isolation process for geometries smaller than 0.25 μm. The traditional STI etch pattern transfer process has used a relatively thick resist stack (>600 nm) to accommodate the low silicon-to-resist etch selectivity in the traditional soft mask STI etch. As ground rules shrink, lithographic depth of focus (DOF), a key driver for manufacturability, decreases as a result of increases in tool numerical aperture (NA) and shorter illumination wavelength (λ). One way to increase DOF is to decrease the photoresist thickness, but this can require substantial chemistry changes in the etch process to improve selectivity. Emerging technologies call for thinner resist stacks to widen the lithographic process window, while at the same time requiring the ability to etch a deeper STI trench. We present an alternative STI etch process not usually used in isolation levels, one which allows for a wider DOF and deeper STI trench, suitable for 0.13 μm logic technology and beyond
  • Keywords
    etching; integrated circuit manufacture; integrated logic circuits; isolation technology; masks; optical focusing; photolithography; photoresists; 0.13 micron; 0.25 micron; 600 nm; DOF; STI; STI etch pattern transfer process; STI etch process; STI trench; STI trench depth; etch process chemistry; etch selectivity; ground rules; hardmask STI etch process; illumination wavelength; isolation levels; lithographic depth of focus; lithographic process window; logic technology; manufacturability; resist stacks; shallow trench isolation; silicon-to-resist etch selectivity; soft mask STI etch; standard device isolation process; thick resist stack; tool numerical aperture; Apertures; Chemical technology; Chemistry; Etching; Geometry; Isolation technology; Lighting; Logic devices; Manufacturing; Resists;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Advanced Semiconductor Manufacturing Conference, 2001 IEEE/SEMI
  • Conference_Location
    Munich
  • ISSN
    1078-8743
  • Print_ISBN
    0-7803-6555-0
  • Type

    conf

  • DOI
    10.1109/ASMC.2001.925622
  • Filename
    925622