Title :
SwampFinder [IC design for manufacture]
Author :
Maynard, Daniel N. ; Reuter, Bette Bergman ; Rosner, Raymond J.
Author_Institution :
Microelectron. Div., IBM Corp., Essex Junction, VT, USA
Abstract :
Since the semiconductor industry has aggressively shortened product development cycles, characterizing and solving design-process sensitivities has seen a drastic reduction in the “window of opportunity”. Thus, many semiconductor fabricators must build products that include these sensitivities. Often, a design revision is no longer a business option, given time-to-market requirements; therefore, the manufacturer must engineer a serviceable alternative. Knowledge of these potential problems prior to releasing wafers allows manufacturing engineering to make process adjustments encompassing these specific parts. Many of these problems may be isolated to specific geometries or shape configurations within the design data, and, therefore, sophisticated shape checks may be deployed. The IBM Microelectronics Vermont facility has developed a system for identification of these locations (i.e. “find the muck in the design”) using a tool called “SwampFinder”. This paper discusses both the supporting methodology and software behind this approach and includes several examples illustrating the types of sensitivities that may be identified. This paper also describes a feed-forward strategy targeted at both the reduction of incoming incompatible design content and the engineering of tolerant processes. Lastly, a larger picture of physical design characterization in manufacturing is introduced
Keywords :
circuit analysis computing; design for manufacture; feedforward; integrated circuit design; integrated circuit manufacture; product development; software tools; IC design for manufacture; SwampFinder tool; design data; design revision; design shape configurations; design-process sensitivities; feed-forward strategy; incoming incompatible design content reduction; manufacturing engineering; physical design characterization; process adjustments; product development cycles; semiconductor fabricators; semiconductor industry; shape checks; shape location identification; time-to-market requirements; tolerant process engineering; wafer release; window of opportunity; Design engineering; Electronics industry; Geometry; Knowledge engineering; Manufacturing processes; Microelectronics; Product development; Semiconductor device manufacture; Shape; Time to market;
Conference_Titel :
Advanced Semiconductor Manufacturing Conference, 2001 IEEE/SEMI
Conference_Location :
Munich
Print_ISBN :
0-7803-6555-0
DOI :
10.1109/ASMC.2001.925639