Efficient killer-defect control using reliable high-throughput SEM-ADC

Author

Watanabe, K. ; Takagi, Yuji ; Obara, Kenji ; Okuda, Hirohito ; Nakagaki, Ryo ; Kurosaki, Toshiei

Author_Institution

Semicond. Manuf. Technol. Div., Hitachi Ltd., Ibaraki, Japan

fYear

2001

fDate

2001

Firstpage

219

Lastpage

222

Abstract

An efficient killer-defect control method using a reliable high throughput scanning electron microscope and automatic defect classification (ADC) is described. The concept of ADC system-class is used to facilitate recipe set-up (defect imageless tuning). Experiments demonstrated that the performance of this method exceeds that specified by the International Technology Roadmap for Semiconductors. This method is applicable to both application-specific IC and system-on-chip production lines

Keywords

application specific integrated circuits; inspection; integrated circuit reliability; integrated circuit testing; integrated circuit yield; pattern classification; production testing; ADC system-class; application-specific IC production lines; automatic defect classification; defect imageless tuning; killer-defect control; reliable high-throughput SEM-ADC; scanning electron microscope; system-on-chip production lines; test recipe set-up; Application specific integrated circuits; Automatic control; Data mining; Inspection; Production systems; Scanning electron microscopy; Semiconductor films; System-on-a-chip; Throughput; Virtual colonoscopy;

fLanguage

English

Publisher

ieee

Conference_Titel

Advanced Semiconductor Manufacturing Conference, 2001 IEEE/SEMI

Conference_Location

Munich

ISSN

1078-8743

Print_ISBN

0-7803-6555-0

Type

conf

DOI

10.1109/ASMC.2001.925649

Filename

925649