Title :
RELY: a reliability simulator for VLSI circuits
Author :
Hsu, Wen-jay ; Shih, Chih-Ching ; Sheu, Bing J.
Author_Institution :
Inf. Sci. Inst., Univ. of Southern California, Los Angeles, CA, USA
Abstract :
A novel reliability simulator and its associated circuit-level degradation models with automated parameter extraction procedures for VLSI circuits have been developed. This circuit reliability modeling and simulation environment can serve as a bridge between the system and device reliability. Performance and lifetime of digital and analog ICs can be optimized through the usage of this reliability simulator
Keywords :
VLSI; circuit reliability; digital simulation; RELY; VLSI circuits; analog ICs; automated parameter extraction procedures; circuit-level degradation models; digital ICs; lifetime; reliability simulator; simulation environment; Circuit simulation; Circuit synthesis; Circuit testing; Degradation; Design automation; Electrodes; Integrated circuit reliability; Stress; Very large scale integration; Voltage;
Conference_Titel :
Custom Integrated Circuits Conference, 1988., Proceedings of the IEEE 1988
Conference_Location :
Rochester, NY
DOI :
10.1109/CICC.1988.20945
