Title :
Diagnosis and analysis of an analog circuit failure using time resolved emission microscopy
Author :
Syed, Ahmed ; Herlein, Richard ; Cain, Ben ; Sauk, Frank
Author_Institution :
Credence Syst. Corp., San Jose, CA
Abstract :
Acquiring the waveforms of internal nodes in an operating integrated circuit has been a key technique in understanding and resolving design and process related anomalies for many years. Time resolved emission (TRE) has emerged as a technique of choice for acquiring waveforms from the backside of digital ICs. This paper describes the techniques used for diagnosing an analog level problem in a mixed signal IC, employing a TRE system as the main debugging tool. This debug effort is significant in the sense that a backend failure analysis tool that is typically dedicated to digital circuits was used for the first time to successfully diagnose an analog fault on an asynchronous timing path. A design-for-debug strategy adopted early in the design cycle proved to be important in allowing timely TRE failure analysis resolution of this device
Keywords :
failure analysis; fault diagnosis; integrated circuit testing; mixed analogue-digital integrated circuits; time resolved spectroscopy; analog circuit failure; analog level problem; asynchronous timing; backend failure analysis tool; debugging tool; design-for-debug strategy; digital IC backside; digital circuits; failure diagnosis; mixed signal IC; time resolved emission microscopy; Analog circuits; Analog integrated circuits; Circuit faults; Debugging; Digital circuits; Failure analysis; Microscopy; Process design; Signal resolution; Timing;
Conference_Titel :
Test Conference, 2005. Proceedings. ITC 2005. IEEE International
Conference_Location :
Austin, TX
Print_ISBN :
0-7803-9038-5
DOI :
10.1109/TEST.2005.1584093