Behavioral modeling and simulation of analog/mixed-signal systems using Verilog-AMS

This paper presents a methodology for modeling and simulation of analog/mixed-signal systems using Verilog-AMS. Through this approach, it becomes more efficient and convenient to model analog, digital and mixed-signal design. Moreover, it is also a good solution for analog/mixed-signal verification because simulation time will be greatly decreased in this way. The applied methodology brings together the modeling and simulation of a PLL (Phase Locked Loop) in the Cadence AMS design environment. The results show that this methodology provides a standardized framework in order to efficiently and accurately model and simulate complex analog/mixed signal applications.