DocumentCode :
3133480
Title :
The effect of nitrogen pre-annealing on the sidewall oxidation of WSix and on the related electrical properties of WSix /poly Si gate structure
Author :
Kang, Dae-Hwan ; Kim, Hyeon-Soo ; Chung, Myung-Jun ; Ahn, Kwang-Ho ; Chung, Sang-Tae ; Park, Kyoung-Wook ; Cho, Gyu-Seog ; Park, Jae-Beom ; Koh, Yo-Hwan
Author_Institution :
Semicond. Adv. Res. Div, Hyundai Electron. Ind. Co. Ltd., Kyungki-do, South Korea
fYear :
1999
fDate :
1999
Firstpage :
25
Lastpage :
29
Abstract :
N2 pre-annealing at 900°C for 20 minutes was effective to suppress undesirable sidewall oxidation of WSix in a tungsten polycide gate structure during post oxidation processing. Contact resistance measurements show that the N2 pre-annealing improved the metal contact resistance on the gate while it degraded the tungsten polycide contact resistance on the gate. The contradictory effects on two contact resistances on the gate are attributed to Si out-diffusion from dichlorosilane-based tungsten silicide (DCS-WSix) during N2 pre-annealing. From experiment and simulation data, it is verified that the additional thermal budget of N2 pre-annealing does not affect the device parameters of n- or p-MOSFETs at gate length L=10 μm. It is considered that the segregation of fluorine (F) atoms from DCS-WSix on to the gate oxide caused the increase in threshold voltage (V T), the reduction of saturation current (IDSAT), and the increase in subthreshold slope of n-MOSFETs. However, no significant changes were observed in p-MOSFETs. On the other hand, the gate oxide characteristics were not degraded by N2 pre-annealing
Keywords :
MOSFET; VLSI; annealing; contact resistance; dielectric thin films; elemental semiconductors; nitrogen; oxidation; segregation; semiconductor device measurement; semiconductor device metallisation; semiconductor process modelling; silicon; tungsten compounds; 10 micron; 20 min; 900 C; DCS-WSix layer; F atom segregation; N2; N2 pre-annealing; Si out-diffusion; WSi-Si; WSix sidewall oxidation; WSix/poly Si gate structure; contact resistance measurements; dichlorosilane-based tungsten silicide; electrical properties; gate oxide; gate oxide characteristics; metal contact resistance; n-MOSFETs; nitrogen pre-annealing; p-MOSFET; p-MOSFETs; post oxidation processing; saturation current; sidewall oxidation; sidewall oxidation suppression; simulation; subthreshold slope; thermal budget; threshold voltage; tungsten polycide contact resistance; tungsten polycide gate structure; Annealing; Contact resistance; Implants; MOSFET circuits; Nitrogen; Oxidation; Silicides; Temperature; Tungsten; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Physical and Failure Analysis of Integrated Circuits, 1999. Proceedings of the 1999 7th International Symposium on the
Print_ISBN :
0-7803-5187-8
Type :
conf
DOI :
10.1109/IPFA.1999.791293
Filename :
791293
Link To Document :
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