• DocumentCode
    3133559
  • Title

    Achieving higher yield through diagnosis-the ASIC perspective

  • Author

    Schuermyer, Chris

  • Author_Institution
    LSI Logic Corp., CA
  • fYear
    2005
  • fDate
    8-8 Nov. 2005
  • Lastpage
    1309
  • Abstract
    Yield learning is more important to ASIC vendors than ever. The high cost of developing a 90 nm ASIC will result in a smaller number of high volume devices. Achieving yield goals during production ramp can be the difference between product success and failure. Yield and Product engineers are faced with all of the traditional fabrication issues, like particle related defects and device model matching, which have always made yield learning a challenge. Several new trends are taking hold with sub-130 nm processing that will make yield learning even more of a challenge in the future
  • Keywords
    application specific integrated circuits; fault diagnosis; integrated circuit modelling; integrated circuit testing; integrated circuit yield; 90 nm; ASIC IP; ASIC yield diagnosis; device model matching; foundry models; particle related defects; pattern related yield limiters; Application specific integrated circuits; Failure analysis; Foundries; Graphics; Integrated circuit yield; Lithography; Logic; Manufacturing processes; Process design; Testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Conference, 2005. Proceedings. ITC 2005. IEEE International
  • Conference_Location
    Austin, TX
  • Print_ISBN
    0-7803-9038-5
  • Type

    conf

  • DOI
    10.1109/TEST.2005.1584126
  • Filename
    1584126