Study on test generation and diagnosis optimization algorithm for wiring interconnects

With the increasing number of chips with boundary-scan structure, boundary-scan technique becomes a new and effective way of test and design-for-testability for VLSI circuits. Because of the serial nature of the boundary scan tests, it is important to minimize the test size while maintaining diagnosability. This paper analyzes the advantages and deficiencies of traditional test generation and diagnosis algorithm for wiring interconnects. In addition, we present an optimal algorithm, Equal-Weight & Min-Distance Algorithm. It achieves a good trade-off between test compactness and diagnosability. It can effectively reduce test time and improve fault diagnosability.