• DocumentCode
    3133604
  • Title

    A monolithically integrated logic photoreceiver with double-heterojunction bipolar transistors

  • Author

    Yoneyama, Mikio ; Sano, Eiichi ; Yamahata, Shoji ; Matsuoka, Yutaka

  • Author_Institution
    NTT LSI Labs., Atsugi, Japan
  • fYear
    1995
  • fDate
    9-13 May 1995
  • Firstpage
    361
  • Lastpage
    364
  • Abstract
    A simplified logic photoreceiver with a photodetector directly connected to a decision circuit has been monolithically integrated with double-heterojunction bipolar transistors. Neither a preamplifier nor compensation circuits was used in this photoreceiver. A power estimation model was introduced to the simplified photoreceiver. Important device characteristics for error-free operation under practical conditions were quantitatively discussed. A 10-Gbit/s error free operation for a 1.55-μm wavelength was successfully achieved
  • Keywords
    bipolar logic circuits; decision circuits; infrared detectors; integrated optoelectronics; optical interconnections; optical receivers; p-i-n photodiodes; photodetectors; 1.55 mum; 10 Gbit/s; decision circuit; double-heterojunction bipolar transistors; error free operation; error-free operation; monolithically integrated logic photoreceiver; photodetector; pin photodiode; power estimation model; simplified logic photoreceiver; Bipolar transistors; Circuits; Error-free operation; Fluctuations; Logic; Optical interconnections; Optical receivers; Optical signal processing; Power dissipation; Preamplifiers;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Indium Phosphide and Related Materials, 1995. Conference Proceedings., Seventh International Conference on
  • Conference_Location
    Hokkaido
  • Print_ISBN
    0-7803-2147-2
  • Type

    conf

  • DOI
    10.1109/ICIPRM.1995.522154
  • Filename
    522154