Title :
Failure analysis of μBGA-new approaches in fault isolation
Author :
Hor, Kuan Siew ; Thian, Teh Swee
Author_Institution :
Device Analysis Lab., Adv. Micro Devices Export Sdn Bhd, Penang, Malaysia
Abstract :
While failure analysis techniques for conventional packages are well developed, it is not so for the chip-scale μBGA package. The reason is that access to the die surface while maintaining package interconnection for electrical set-up is no longer trivial. This paper presents some new approaches which are viable for the failure analysis of μBGAs, along with some encouraging results
Keywords :
ball grid arrays; chip scale packaging; etching; failure analysis; fault location; integrated circuit interconnections; integrated circuit testing; μBGAs; chip-scale microBGA package; die surface access; electrical set-up; etching; failure analysis; failure analysis techniques; fault isolation; microBGA; package interconnection; packages; Bonding; Chip scale packaging; Copper; Etching; Failure analysis; Laboratories; Lead; Plasma temperature; Polyimides; Structural beams;
Conference_Titel :
Physical and Failure Analysis of Integrated Circuits, 1999. Proceedings of the 1999 7th International Symposium on the
Print_ISBN :
0-7803-5187-8
DOI :
10.1109/IPFA.1999.791306
