Channel-width effect on hot-carrier degradation in nMOSFETs with recessed-LOCOS isolation structures

Author

Yue, J.M.P. ; Chim, W.K. ; Cho, B.J. ; Chan, D.S.H. ; Qin, W.H. ; Kim, Y.B. ; Jang, S.-A. ; Yeo, I.S.

Author_Institution

Centre for Integrated Circuit Failure Analysis & Reliability, Nat. Univ. of Singapore, Singapore

fYear

1999

fDate

1999

Firstpage

94

Lastpage

98

Abstract

Narrow-channel nMOSFETs with recessed LOCOS (R-LOCOS) isolation structures exhibit less hot-carrier-induced degradation than wide-channel nMOSFETs, but the degradation mechanism of both devices is the same. This new finding is explained by the fact that in deep sub-μm MOSFETs with ultra-thin gate oxides and a relatively thin field oxide, the dominant factor deciding the degradation behaviour in narrow channel and wide channel devices is the vertical electric field effect rather than the mechanical stress effect

Keywords

MOSFET; dielectric thin films; electric fields; hot carriers; isolation technology; semiconductor device reliability; semiconductor device testing; MOSFETs; R-LOCOS isolation structures; SiO₂-Si; channel-width effect; degradation behaviour; degradation mechanism; hot-carrier degradation; hot-carrier-induced degradation; mechanical stress effect; nMOSFETs; narrow-channel nMOSFETs; recessed-LOCOS isolation structures; thin field oxide; ultra-thin gate oxides; vertical electric field effect; wide-channel nMOSFETs; CMOS technology; Degradation; Electron traps; Etching; Hot carrier effects; Hot carriers; MOSFETs; Oxidation; Silicon; Stress;

fLanguage

English

Publisher

ieee

Conference_Titel

Physical and Failure Analysis of Integrated Circuits, 1999. Proceedings of the 1999 7th International Symposium on the

Print_ISBN

0-7803-5187-8

Type

conf

DOI

10.1109/IPFA.1999.791313

Filename

791313