Automatic DRAM cell location in the SEM

Author

Thong, J.T.L. ; Zhu, Y. ; Phang, J.C.H.

Author_Institution

Dept. of Electr. Eng., Nat. Univ. of Singapore, Singapore

fYear

1999

fDate

1999

Firstpage

104

Lastpage

107

Abstract

The highly repetitive nature of a DRAM cell array requires the failure analyst to perform the tedious task of manually counting and tracking cells in order to locate on the die the position of a failed cell that has been identified through electrical testing. This paper describes a vision-based system that automates the task of cell location without the need for a high-accuracy specimen stage. The algorithm makes use of cross-correlation to track a moving die, and mimics the action that would otherwise be carried out by the SEM operator in locating a cell position

Keywords

DRAM chips; correlation methods; failure analysis; inspection; integrated circuit reliability; integrated circuit testing; position measurement; scanning electron microscopy; DRAM cell array; SEM; SEM operator action; automatic DRAM cell location; cell counting; cell location; cell position; cell tracking; cross-correlation; electrical testing; failed cell position location; failure analysis; high-accuracy specimen stage; moving die tracking; vision-based system; Delay; Failure analysis; Image resolution; Modems; Performance analysis; Performance evaluation; Random access memory; Scanning electron microscopy; Testing; Tracking;

fLanguage

English

Publisher

ieee

Conference_Titel

Physical and Failure Analysis of Integrated Circuits, 1999. Proceedings of the 1999 7th International Symposium on the

Print_ISBN

0-7803-5187-8

Type

conf

DOI

10.1109/IPFA.1999.791315

Filename

791315