The impact of pseudomorphic AlAs spacer layers on the gate leakage current of InAlAs/InGaAs heterostructure field-effect transistors

Pseudomorphic AlAs layers as hole barriers have been inserted in the spacer of InAlAs/InGaAs HFETs. The channel-gate transfer rate of the holes exponentially decreases with AlAs layer thickness, but the absolute reduction factor is low. The optimum AlAs hole barrier thickness, which is only limited by the critical thickness, can be evaluated as 2.0-2.4 nm (about 8 monolayers). The reduction factor is larger than 2. Despite the large lattice-mismatch of the AlAs layer, no degradation in transport and device performance of type 8 ML could be observed, as demonstrated by the drain- and gate-characteristics. The excellent transport, DC- and RF-data of type 8 ML and the low gate leakage current demonstrate the potential of pseudomorphic AlAs containing spacer layers