Title :
A systolic architecture for image segmentation by adaptive progressive thresholding
Author :
Asari, K.V. ; Srikanthan, T. ; Kuma, S. ; Radhakrishnan, D.
Author_Institution :
Nanyang Technol. Inst., Singapore
Abstract :
A special purpose VLSI architecture for the real time segmentation of endoscopic images is proposed in this paper. The architecture is based on a systolic implementation of a new algorithm named adaptive progressive thresholding (APT) that segments the darkest area of an endoscopic image representing the gastrointestinal lumen. This segmentation process is an extension of the Otsu´s (1978) method. The progressive approach of thresholding optimizes the threshold for an endoscopic image using an iterative procedure. A condition to converge the iterative procedure is suggested to make the segmentation automatic and adaptive. The APT algorithm is mapped onto a modified linear systolic array of simple processing elements with the elements of a particular segment communicating with its neighbors. The APT architecture is partitioned based on various sequential functions involved in the segmentation process and these functional modules are organized in a pipelined fashion according to their hardware feasibility. Currently, a prototype of the VLSI architecture for an image size of 256×256 is being designed and built. The functional simulation results obtained in the APT architecture are encouraging
Keywords :
image segmentation; 256 pixel; 65536 pixel; APT algorithm; VLSI architecture; adaptive progressive thresholding; endoscopic images; functional modules; gastrointestinal lumen; image segmentation; iterative procedure; modified linear systolic array; pipelined fashion; real time segmentation; sequential functions; systolic architecture; thresholding;
Conference_Titel :
Image Processing And Its Applications, 1999. Seventh International Conference on (Conf. Publ. No. 465)
Conference_Location :
Manchester
Print_ISBN :
0-85296-717-9
DOI :
10.1049/cp:19990291