Title :
Design of a Stereoscopic 3D Video Processing System Based on FPGA 3D Formatter in Case of FPR
Author :
Sokullu, Radosveta ; Aydin, M.
Author_Institution :
Dept. of Electr. & Electron. Eng., Ege Univ., Izmir, Turkey
Abstract :
In this paper, we present the details of a video processing system that combines the advantages of Film Patterned Retarder LED/LCD display technology and an FPGA based 3D formatter with enhanced, superior video processing techniques such as formatting, color correction and 3D video depth adjustment. The system includes hardware and software implementation which is designed to process stereoscopic 3D formats using a new methodology. A significant advantage of the system is the possibility to support HDMI 1.4 mandatory formats by using HDMI 1.3 capable System-on-Chip (SoC) scaler IC. The 3D function is provided by FPGA based 3D formatter. Because of the reconfigurable enhanced video blocks, the suggested FPGA based formatter can be designed as an ASIC chip to be used in TVs and set-top box (STB) applications.
Keywords :
LED displays; application specific integrated circuits; liquid crystal displays; stereo image processing; system-on-chip; video signal processing; 3D function; ASIC chip; FPGA based 3D formatter; FPR; HDMI 1.3 capable system-on-chip scaler IC; HDMI 1.4 mandatory formats; SoC; film patterned retarder LED-LCD display technology; reconfigurable enhanced video blocks; set-top box applications; stereoscopic 3D video processing system; Clocks; Field programmable gate arrays; Image color analysis; Stereo image processing; Streaming media; Three-dimensional displays; 3D; FPGA based 3D formatter; Film Patterned Retarder; Stereoscopic 3D;
Conference_Titel :
Signal-Image Technology & Internet-Based Systems (SITIS), 2013 International Conference on
Conference_Location :
Kyoto
DOI :
10.1109/SITIS.2013.29