DocumentCode :
3134760
Title :
Learning VLSI design using programmable logic arrays
Author :
Boemo, Eduardo I. ; Meneses, Juan M.
Author_Institution :
E.T.S.I. Telecommunicacion, Madrid, Spain
fYear :
1993
fDate :
6-9 Nov 1993
Firstpage :
422
Lastpage :
425
Abstract :
The authors describe technical aspects, organization details, and results of an experimental undergraduate laboratory based on field programmable gate arrays at the School of Telecommunication of Madrid, Spain. The target of the course has been to introduce concepts of ASIC (application-specific integrated circuit) design methodology such as hierarchy, modularity, simulation, and testability, using a low alternative and a design-oriented, hands-on learning approach
Keywords :
VLSI; application specific integrated circuits; educational courses; electronic engineering education; field programmable gate arrays; integrated circuit design; programmable logic arrays; student experiments; teaching; ASIC; Spain; VLSI design; course; education; field programmable gate arrays; hands-on learning approach; hierarchy; modularity; organization; programmable logic arrays; simulation; teaching; technical aspects; testability; undergraduate laboratory; Application specific integrated circuits; Circuit testing; Design automation; Design for testability; Field programmable gate arrays; Laboratories; Logic design; Programmable logic arrays; Software design; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Frontiers in Education Conference, 1993. Twenty-Third Annual Conference. 'Engineering Education: Renewing America's Technology', Proceedings.
Conference_Location :
Washington, DC
ISSN :
0190-5848
Print_ISBN :
0-7803-1482-4
Type :
conf
DOI :
10.1109/FIE.1993.405458
Filename :
405458
Link To Document :
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