Selective Controllability: A Proposal for Testing and Diagnosis

This paper proposes a testing and diagnostic method that reduces fault location and repair costs on printed circuit boards populated with LSI and VLSI modules. The method requires some additional circuitry on the module subassembly. It enhances the following test strategies: automatic probing, bed-of-nails, Subassembly-in-Place, and Level Sensitive to Scan Design (LSSD). In addition, this technique makes it possible to partition large networks into manageable subnetworks for Automatic Test Generation.