Analysis of MOS resistive gate transistors for application in analog multipliers

Placing two contacts on the gate electrode of a MOS transistor allows one to establish a lateral electric field in the resistive gate. The electric field in the gate electrode modifies the inversion charge density and potential profile in the channel of the device, thus modulating the drain current. It was found that a transistor with two gate contacts (one near the source and the other near the drain) above a rectangular active channel region, combined with a narrowing of the gate electrode width going from source to drain, can be used as a multiplying device. This device was simulated and it is shown that a single transistor can be used as a square-law device. Placing two transistors in parallel leads to four quadrant analog multiplication. The square-law and multiplier circuits have a differential input dynamic range of several volts. Device simulation results show that resistive gate devices with nonrectangular gate geometries can be used in novel analog multiplier applications