Title :
Drain current model for single electron transistor operating at high temperature
Author :
Krout, I. ; Touati, M.A. ; Boubaker, A. ; Sghaier, N. ; Kalboussi, A.
Author_Institution :
Microelectron. & Instrum. Lab., Fac. of Sci. of Monastir, Monastir, Tunisia
Abstract :
A simple compact model was proposed to simulate the drain current characteristic for single electron transistor at high temperature, it takes into account all contributions mechanisms; thermionic and tunnel effects. Good agreement was reached with experimental results for temperatures up to 430 K. It is valuable for devices with multiple gates and symmetric or asymmetric structures. This result is suitable for fully SET or hybrid SET / CMOS circuits.
Keywords :
CMOS integrated circuits; single electron transistors; tunnelling; asymmetric structures; drain current model; hybrid SET-CMOS circuits; multiple gates; single electron transistor; symmetric structures; thermionic effects; tunnel effects; Integrated circuit modeling; Junctions; Mathematical model; Predictive models; Semiconductor device modeling; Temperature; Tunneling; Device modeling; Single-electron transistor; Thermionic effect; Tunneling effect; high temperature;
Conference_Titel :
Systems, Signals and Devices (SSD), 2011 8th International Multi-Conference on
Conference_Location :
Sousse
Print_ISBN :
978-1-4577-0413-0
DOI :
10.1109/SSD.2011.5767423
