Title :
Compact thermal modeling for package design with practical power maps
Author :
Liu, Zao ; Tan, Sheldon X -D ; Wang, Hai ; Quintanilla, Rafael ; Gupta, Ashish
Author_Institution :
Dept. of Electr. Eng., Univ. of California, Riverside, CA, USA
Abstract :
This paper proposes a new thermal modeling method for package design of high-performance microprocessors. The new approach builds the thermal behavioral models from the given accurate temperature and power information by means of the subspace method. The subspace method, however, may suffer predictability problem when the practical power is given as a number of power maps where power inputs are spatially correlated. We show that the input power signal needs to meet some dependency requirements to ensure model predictability. We develop a new algorithm, which generates independent power maps to meet the spatial rank requirement and can also automatically select the order of the resulting thermal models for the given error bounds. Experimental results validates the proposed method on a practical microprocessor package constructed via COMSOL software under practical power signal inputs.
Keywords :
chip scale packaging; electronic engineering computing; integrated circuit design; microprocessor chips; COMSOL software; compact thermal modeling; high performance microprocessors; microprocessor package; model predictability; package design; practical power maps; spatial rank requirement; System identification; Temperature measurement; Training;
Conference_Titel :
Green Computing Conference and Workshops (IGCC), 2011 International
Conference_Location :
Orlando, FL
Print_ISBN :
978-1-4577-1222-7
DOI :
10.1109/IGCC.2011.6008577