DocumentCode :
3139916
Title :
Test generation of controllers using the synthesis specifications
Author :
Karam, M. ; Saucier, G. ; Jay, C.
Author_Institution :
Inst. Nat. Polytech. de Grenoble, France
fYear :
1991
fDate :
27-31 May 1991
Firstpage :
284
Lastpage :
289
Abstract :
The test generation of finite state machines proposed by the authors is performed by going first through all the transitions of the control flowgraph them completing the test set of the undetected faults using the Poage method. In more detail the mixed test generation method starts with a functional test generation method producing a very short and effective (in terms of detection quality) test sequence. An original input don´t care optimization phase is invoked. A second phase is based upon a deterministic approach to reach 100% coverage still using the finite state machine specifications.<>
Keywords :
finite state machines; graph theory; logic testing; Poage method; control flowgraph; controllers; deterministic approach; don´t care optimization phase; finite state machines; functional test generation; mixed test generation method; synthesis specifications; test sequence; Automata; Circuit faults; Circuit synthesis; Circuit testing; Electrical fault detection; Fault detection; Fault diagnosis; Logic; Performance evaluation; Sequential circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Euro ASIC '91
Conference_Location :
Paris, France
Print_ISBN :
0-8186-2185-0
Type :
conf
DOI :
10.1109/EUASIC.1991.212851
Filename :
212851
Link To Document :
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