DocumentCode
3140963
Title
PODEM-X: An Automatic Test Generation System for VLSI Logic Structures
Author
Goel, Prabhakar ; Rosales, Barry C.
Author_Institution
nternational Business Machines Corporation, Poughkeepsie, NY
fYear
1981
fDate
29-1 June 1981
Firstpage
260
Lastpage
268
Abstract
Multiple test generation algorithms and techniques described in this paper have been integrated into a unified system which has successfully produced tests for unpartitioned LSSD logic structures of up to 50,000 logic gates. The design concepts behind the creation of a unified system are presented, as are actual results obtained on large logic structures. System usability was significantly enhanced by the same concepts that facilitated the integration of multiple algorithms and techniques.
Keywords
Automatic logic units; Automatic testing; Logic design; Logic gates; Logic testing; Random number generation; Shift registers; System testing; Test pattern generators; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation, 1981. 18th Conference on
Type
conf
DOI
10.1109/DAC.1981.1585361
Filename
1585361
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