Title :
IC process compatibility of sealed cavity sensors
Author :
Parameswaran, Lalitha ; Hsu, Charles H. ; Schmidt, Martin A.
Author_Institution :
Microsystems Technol. Lab., MIT, Cambridge, MA, USA
Abstract :
Sealed cavities formed by wafer bonding represent one technological means of integration of MEMS with electronics. In this work, the survivability of sealed cavity plates subjected to typical CMOS high temperature steps is evaluated. Defect generation in such plates is predicted with modelling of stresses and examined through experiments. Additionally, it is shown that a full CMOS process flow has no detectable impact on the mechanical properties of the bonded layer if the sealed cavity plate is properly sized according to the stress model
Keywords :
CMOS integrated circuits; dislocation etching; etching; finite element analysis; integrated circuit modelling; microsensors; stress analysis; wafer bonding; CMOS high temperature process; IC process compatibility; MEMS; bonded layer; defect generation; mechanical properties; sealed cavity sensors; stress model; wafer bonding; CMOS technology; Circuits; Fabrication; Micromechanical devices; Plastics; Semiconductor device modeling; Silicon; Stress; Temperature sensors; Wafer bonding;
Conference_Titel :
Solid State Sensors and Actuators, 1997. TRANSDUCERS '97 Chicago., 1997 International Conference on
Conference_Location :
Chicago, IL
Print_ISBN :
0-7803-3829-4
DOI :
10.1109/SENSOR.1997.613729
