DocumentCode
3142240
Title
PANAMAP-B: A Mask Verification System for Bipolar IC
Author
Yoshida, J. ; Ozaki, T. ; Goto, Y.
Author_Institution
Wireless Research Labolatory, Matsushita Electric Industrial Co., Ltd., Osaka, Japan
fYear
1981
fDate
29-1 June 1981
Firstpage
690
Lastpage
695
Abstract
As the complexity of IC/LSI structures increase, verification of IC/LSI mask designs becomes extremely difficult and time-consuming. Also, verification of an IC/LSI mask pattern design requires much man-power as well. Further, the actual circuit realized onto IC/LSI chips may be quite different from that originally intended because of parasitic elements, including capacitors, resistors, and transistors. Computer support of mask pattern verification is considered very important and useful for IC/LSI design. This paper describes all functions of PANAMAP-B (Panasonic Mask Analysis Program for Bipolar IC). The main features are: one, no restriction about edge angles of polygonal mask patterns; and two, distributed constant circuit representation of interconnecting conductors and diffusion resistors.
Keywords
Bipolar integrated circuits; Capacitors; Circuit simulation; Conductors; Data mining; Electric resistance; Graphics; Integrated circuit interconnections; Large scale integration; Resistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation, 1981. 18th Conference on
Type
conf
DOI
10.1109/DAC.1981.1585428
Filename
1585428
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