Study of cache system in video signal processors

Memory system design is especially important for video signal processing, where the video signal processor (VSP) not only requires a lot of data, but also needs a very high bandwidth and low latency. While caches become ubiquitous in modern systems, their performance still falls behind that of the processors. Therefore a number of modifications to traditional caches have emerged: victim cache, stream buffer, data prefetching techniques, etc. However, few people have studied cache memory for VSP. We present a case study based on extensive trace-driven scheduling, which shows that while stream buffer and stride prediction table are very effective for streaming video data, they should be applied in a different way in dedicated VSP with higher degrees of parallelism than in current super-scalar workstation architectures