Hierarchical design of a μITRON specification kernel: TR2

In designing the architecture of a realtime kernel, the problem of trading between functions and responses is always important. The authors describe the design approach of TR2 and show how they have solved the problem. TR2 is a realtime kernel for TX-series microprocessors based on the μITRON specification. TR2 employs a two-level hierarchical architecture. A basic kernel provides primitive constant-response functions, while an extension kernel provides various additional functions. TR2 executes these complex functions without locking dispatch. To provide useful programming elements, TR2 allows the complex functions to be requested in an interrupt handler. The complex functions are not executed immediately but deferred, and executed by a server task. With the architecture, TR2 assures constant responses for an interrupt handler and a task