• DocumentCode
    3144276
  • Title

    New failure mechanism during high temperature storage testing and its application on SIV risk evaluation

  • Author

    Aubel, O. ; Yao, W. ; Meyer, M.A. ; Engelmann, H.J. ; Poppe, J. ; Feustel, F. ; Witt, C.

  • Author_Institution
    GLOBALFOUNDRIES Dresden Module One LLC & Co. KG, Dresden, Germany
  • fYear
    2009
  • fDate
    18-22 Oct. 2009
  • Firstpage
    5
  • Lastpage
    10
  • Abstract
    In this paper, we are going to show that changes in barrier resistivity can affect the overall resistance under tests of temperatures higher then 250 °C. We conclude that a resistance increase of several tenths of percent does not necessarily come from stress induced voiding in the high temperature range but can be a result of material parameter changes.
  • Keywords
    circuit testing; high-temperature techniques; risk analysis; wafer level packaging; SIV risk evaluation; barrier resistivity; failure mechanism; high temperature range; high temperature storage testing; material parameter changes; stress induced voiding; Conductivity; Electrical resistance measurement; Electromigration; Failure analysis; Ovens; Packaging; System testing; Temperature distribution; Thermal stresses; Wafer scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Integrated Reliability Workshop Final Report, 2009. IRW '09. IEEE International
  • Conference_Location
    S. Lake Tahoe, CA
  • ISSN
    1930-8841
  • Print_ISBN
    978-1-4244-3921-8
  • Electronic_ISBN
    1930-8841
  • Type

    conf

  • DOI
    10.1109/IRWS.2009.5383044
  • Filename
    5383044
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3144276